1. Field of the Invention
The invention relates to the technique for forming a high-breakdown voltage transistor and a low-breakdown voltage transistor on the same substrate.
2. Description of the Related Art
Driver devices for driving photo devices, liquid crystal displays (LCDs), print heads, and the like are provided with a drive section and a logic section for controlling the drive section. Ordinarily, the drive section includes a high-breakdown voltage transistor with relatively high drain-source breakdown voltage (also called xe2x80x9cdrain breakdown voltagexe2x80x9d), and the logic section contains a low-breakdown voltage transistor with relatively low drain breakdown voltage. The high-breakdown voltage transistor, for example, operates at a supply voltage of about 10 volts or higher, whereas the low-breakdown voltage transistor operates at a supply voltage of about 5 volts or lower.
It is desirable that the high-breakdown voltage transistor and the low-breakdown voltage transistor for the above-described driver device are formed on a single substrate. Conventionally, in order to efficiently form transistors with different breakdown voltages on the same substrate, part of the process for manufacturing each transistor is common to both, but in many cases the characteristics of at least one of the transistors are damaged accordingly.
The object of the present invention is thus to solve the drawbacks of the prior art discussed above and to provide a technique for efficiently forming a high-breakdown voltage transistor and a low-breakdown voltage transistor on the same substrate while reducing the deterioration of each transistor""s characteristics.
At least part of the above and the other related objects is attained by a method for manufacturing a semiconductor device of the present invention. In the semiconductor device, a high-breakdown voltage transistor and a low-breakdown voltage transistor of insulated-gate type, having different drain-source breakdown voltages, are present on the same semiconductor substrate, each transistor being formed in one of element formation regions of the substrate, each element formation region including a source formation region and a drain formation region. The manufacturing method comprises the steps of: (a) forming an insulating film containing portions to be used as gate insulating films within each of the element formation regions, the insulating film portions formed on the drain and source formation regions for the high-breakdown voltage transistor being thicker than those for the low-breakdown voltage transistor; (b) forming gates on the insulating films of the transistors; (c) forming sidewalls on the sides of the gate of at least the low-breakdown voltage transistor, and making apertures in the insulating film portions over the drain and source formation regions for the transistors by etching, wherein when the apertures are made in relatively thick insulating film portions on the drain and source formation regions for the high-breakdown voltage transistor, the etching is performed without narrowing widths of sidewalls formed on the sides of the gate of the low-breakdown voltage transistor; and (d) introducing impure elements into the drain and source formation regions for the transistors through the apertures made in the insulating film so as to form drain and source regions of the transistors.
In this method, when the apertures are made in the relatively thick insulating film portions on the drain and source forming regions for the high-breakdown voltage transistor, etching is performed not to narrow the widths of the sidewalls formed on the sides of the low-breakdown voltage transistor gate. This enables the drain-source distance on the low-breakdown voltage transistor to be kept relatively precise, which makes it possible to reduce the lowering of drain-source breakdown voltage (that is, drain breakdown voltage). In other words, using this method makes it possible to efficiently form the high-breakdown voltage transistor and the low-breakdown voltage transistor on the same substrate, and to reduce the deterioration of each transistor""s characteristics.
In one preferable application, the step (c) may include: (c1) forming, on the element formation region for at least the low-breakdown voltage transistor, a material film composed of insulating material different from the insulating film; (c2) performing selective etching for etching the material film without etching the insulating film, so as to form the sidewalls on the sides of the gate of at least the low-breakdown voltage transistor; and (c3) performing selective etching for etching the insulating film without etching the material film, so as to make the apertures in the insulating film portions present above the drain and source formation regions for the transistors.
This arrangement makes it possible to selectively etch the material film and the insulating film, which in turn makes it possible to etch the insulating film portions on the drain and source formation regions for the high-breakdown voltage transistor in a way that does not cause the sidewalls formed on the sides of the low-breakdown voltage transistor gate to narrow.
In the above method, the semiconductor substrate may be a silicon substrate; the insulating film may be a silicon oxide film; and the material film may be a silicon nitride film.
In the above method, it is preferable that the step (b) includes forming the gates of the transistors of polysilicon; the step (c) includes forming a silicon oxide film on the sides of the gates formed of polysilicon prior to the formation of the sidewalls; and the step (d) includes introducing impure elements into the gates.
In this way, it is possible to form the transistor gate from polysilicon into which impure elements have been introduced rather than from metallic materials. Also, by using the above method, a silicon oxide film is formed between the gate composed of polysilicon and the sidewalls composed of silicon nitride. The interposition of the silicon oxide film makes it possible to relax the stress that arises due to the formation of the silicon nitride film, which in turn makes it possible to reduce the occurrence of pealing and cracking.
In another preferable application, the step (c) may include: (c1) forming, on the element formation region for at least the low-breakdown voltage transistor, a material film composed of the same material as the insulating film; (c2) etching the material film so as to form the sidewalls on the sides of the gate of at least the low-breakdown voltage transistor; and continuing the etching so as to make the apertures on the relatively thin insulating film portions present over the drain and source formation regions for the low-breakdown voltage transistor; (c3) forming a resist for protecting the element formation region for the low-breakdown voltage transistor; and (c4) further etching the insulating film so as to make the apertures on the relatively thick insulating film portions remaining over the drain and source formation regions for the high-breakdown voltage transistor.
In this arrangement, when the apertures are made in the relatively thick insulating film portions that remains above the drain and source formation regions for the high-breakdown voltage transistor, the sidewalls formed on the sides of the low-breakdown voltage transistor gate will not be etched. This makes it possible to etch the insulating film portions on the drain and source formation regions for the high-breakdown voltage transistor without narrowing the width of the sidewalls.
In the above method, the semiconductor substrate may be a silicon substrate; and the insulating film and the material film may be silicon oxide films.
In the above method, it is preferable that the semiconductor substrate is a silicon substrate; the insulating film is a silicon oxide film; the step (b) includes forming the gates of the transistors of polysilicon; and the step (d) includes introducing impure elements into the gates.
In this way, it is possible to form the transistor gate from polysilicon into which impure elements have been introduced rather than from metallic materials.
In the above method, the step (b) may include forming the gate of the high-breakdown voltage transistor over a center portion of the gate insulating film; and the step (d) may include the steps of: providing a resist above a peripheral portion of the gate insulating film of at least the high-breakdown voltage transistor; and introducing the impure elements into the drain and source formation regions for the transistors by ion implantation.
When making the apertures in the relatively thick insulating film portions above the drain and source formation regions for the high-breakdown voltage transistor, the periphery of the high-breakdown voltage transistor gate insulating film will become relatively thin. If the periphery of the high-breakdown voltage transistor gate insulating film is thin, impurities will sometimes be implanted into the lower layer regions of the gate insulating film periphery. In such cases, the distance between the drain and source regions will decrease, resulting in lower drain breakdown voltage. But the above arrangement makes it possible to suppress the implantation of impurities into the lower layer regions of the high-breakdown voltage transistor gate insulating film, which in turn makes it possible to reduce the lowering of drain breakdown voltage.
In the above method, the step (b) may include forming the gate of the high-breakdown voltage transistor over a center portion of the gate insulating film; and the method may further comprise the steps of: (e) providing a protective film above a peripheral portion of the gate insulating film of at least the high-breakdown voltage transistor; and (f) forming a metallic layer over at least the drain and source regions of the transistors, and causing the metallic layer to compound with surface layers of the drain and source regions, so as to form contact layers for connecting to metal wires.
When making the apertures in the relatively thick insulating film portions above the drain and source formation regions for the high-breakdown voltage transistor, the periphery of the high-breakdown voltage transistor gate insulating film will become relatively thin. If the periphery of the high-breakdown voltage transistor gate insulating film is thin, the metallic layer will compound with the lower layer regions of the gate insulating film periphery. In such cases, the distance between contact layers of the drain region and the source region will decrease, resulting in lower drain breakdown voltage. But the above arrangement makes it possible to suppress the compounding of the metallic layer with the lower layer regions of the gate insulating film of the high-breakdown voltage transistor, which in turn makes it possible to reduce the lowering of drain breakdown voltage.
In the above method, the semiconductor substrate may be a silicon substrate; the insulating film may be a silicon oxide film; the step (b) may include forming the gates of the transistors of polysilicon; the step (d) may include introducing impure elements into the gates; and the step (f) may include forming the metallic layer over the gates of the transistors, and causing the metallic layer to compound with the surface layers of the gates, so as to form the contact layers.
As described above, when the gate is composed of polysilicon, it is preferable that a contact layer is formed on the gate surface. The compound of silicon and metal is called a silicide.
The present invention is also directed to a semiconductor device, which comprises: a semiconductor substrate; and a high-breakdown voltage transistor and a low-breakdown voltage transistor of insulated-gate type, having different drain-source breakdown voltages, formed on the semiconductor substrate. The low-breakdown voltage transistor comprises: a first gate insulating film; a first gate formed over the first gate insulating film; and first sidewalls formed on the sides of the first gate and composed of different material from the first gate insulating film.
When the invented method is employed, a semiconductor device have the characteristics described above is manufactured.
These and other objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with the accompanying drawings.